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Journal Publications
  •  
    		•  Conference and Other Publications
  •  
    		•  Invited Talks
  •  
    		•  Presentations

     

    Journal Publications

    1. D. Park, C.A. Nicopoulos, J. Kim, N. Vijaykrishnan, and C.R. Das, "Design Space Exploration for Fault- Tolerant On-Chip Interconnects", submitted to IEEE Transactions on Dependable and Secure Computing (TDSC) , 2007.

    2. Jongman Kim, Chrysostomos Nicopoulos, Dongkook park, N. Vijaykrishnan, and Chita R. Das, "Performance and Measurements: Design and Analysis of Heterogeneous Multicore Architectures from a Resource-Constranied Perspective", submitted to IEEE Transactions on Parallel and Distributed Systems (TPDS), IEEE Press.

    3. Jongman Kim, Chrysostomos Nicopoulos, Dongkook park, N. Vijaykrishnan, Mazin Yousif, and Chita R. Das, "A Comprehensive Approach to Design Media-Oriented Smart Memory Systems", to be submitted to IEEE Transactions on VLSI Systems (TVLSI) .

    Conference Publications and Others

    1. D. Park, R. Das, C. A. Nicopoulos, J. Kim, N. Vijaykrishnan, R. Iyer, and C. R. Das, "Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects", in Proc. the Hot Interconnects Symposium, pp. 15-20, August 2007, Stanford, CA.

    2. Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparana Das, Yuan Xie, N. Vijaykrishnan, and Chita R. Das, "A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures", to appear in the Proceedings of the 34th Annual International Symposium on Computer Architecture (The 34th ISCA), June 9-13, 2007, San Diego, CA, USA. (acceptance rate=22%).

    3. Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Mazin S. Yousif, N. Vijaykrishnan, and Chita R. Das, "A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks", in the Proceedings of the 33rd Annual International Symposium on Computer Architecture (The 33rd ISCA) , pp. 4-15, June, 2006, Boston, MA, USA. (acceptance rate=13%)[pdf]

    4. Chrysostomos Nicopoulos, Dongkook Park, Jongman Kim, N. Vijaykrishnan, Mazin S. Yousif and Chita R. Das, ``ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers'', to appear in the Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, 2006 (Micro-39) , December, 2006, Orlando, Florida, USA. the Best Paper Canididate. (acceptance rate=22%)

    5. Jongman Kim, Dongkook Park, T. Theocharides, N. Vijaykrishnan, and Chita R. Das, ``A Low Latency Router Supporting Adaptivity for On-Chip Interconnects'', in the Proceedings of the 42nd Design Automation Conference (The 42nd DAC), pp. 559-164, June 2005, San Diego, California, USA. (acceptance rate=20%)

    6. Jongman Kim, Dongkook Park, Chrysostomos Nicopoulos, N. Vijaykrishnan, and Chita R. Das, ``Design and Analysis of an NoC Architecture from Performance, Reliability and Energy Perspective'', in the Proceedings of the 2005 Symposium on Architectures for Networking and Communi cations Systems (ANCS 2005) , pp. 173-182, October 2005, Princeton, NJ, USA. (acceptance rate=23%)

    7. Jongman Kim, Dongkook Park, Chrysostomos Nicopoulos, N. Vijaykrishnan, and Chita R. Das, "Performance Enhancement through Early Release and Buffer Optimization in Network-on-Chip Architectures", in the Proceedings of Design, Automation and Test in Europe (DATE 2006) , March, 2006, Messe Munich, Germany.

    8. Dongkook Park, Chrysostomos A. Nicopoulos, Jongman Kim, N. Vijaykrishnan, and Chita R. Das, ``Exploring Fault-Tolerant Network-on-Chip Architectures'', in the Proceedings of Dependable Systems and Networks (DSN06), pp. 93-102, June, 2006, Philadelphia, USA. (acceptance rate=18%)

    9. Dongkook Park, Chrysostomos A. Nicopoulos, Jongman Kim, N. Vijaykrishnan, and Chita R. Das, "A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects", in the Proceedings of the 1st International Conference on Nano-Networks (Nano-Net 2006), September 14-16, 2006, Lausanne, Switzerland.

    10. Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, N. Vijaykrishnan, and Chita R. Das, "A Fine-Grained Modular Architecture for System-on-Chip Networks", Technical Report, CSE-06-013, Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA, August, 2006.

    11. Jongman Kim, N. Vijaykrishnan, and Chita R. Das, "Exploring Network-on-Chip (NoC) Architectures Design Space", Technical Report, CSE-05-025, Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA, May, 2005.

    12. Greg Link, Jongman Kim, N. Vijaykrishnan, and Chita R. Das, "Network-on-Chip (NoC) Architectures: A Resource-Constrained Perspectivep", Technical Report, CSE-04-014, Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA, April, 2004.

    13. Jongman Kim, George Kesidis,"Multipath Demand Distribution Balancing in Multiprotocol Label Switching (MPLS) Networks", MS. Thesis, the Dept. of Electrical Engineering, The Pennsylvania State University, University Park, PA 16802, Aug 2001.

    14. Jongman Kim, "Optimum Design Partitioning for a Single Board Transceiver in PCS CDMA Common Air Interface Protocol", MC Technology Training Material, page 92-115, Vol 2, MC Division, LG Information \& Communications Inc, Seoul, Korea, April 1998.

    Invited Talks

    1. A Comprehensive Approach to Design Network-on-Chip Architectures for SoC/Multicore Systems, University of Rochester, Rochester, NY, April 2, 2007.

    2. Energy Charaterization and Thermal Impact in Multicore Architecture.
      Workshop on Material Engineering and Applications of Nanotechnology in KSA, Piscataway, NJ, June, 2006.

    3. The Communication Centric System-on-Chip Architecture.
      LG Electronics Workshop, Fairfax, VA, August, 2004.

    Presentations

    1. A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks,
      the 33rd Annual International Symposium on Computer Architecture (The 33rd ISCA) , June 18-21, 2006, Boston, MA, USA.

    2. Performance Enhancement through Early Release and Buffer Optimization in Network-on-Chip Architectures,
      the NoC workshop of Design, Automation and Test in Europe (DATE 2006), March 10, 2006, Messe Munich, Germany.

    3. Design and Analysis of an NoC Architecture from Performance, Reliability and Energy Perspective,
      the Symposium on Architectures for Networking and Communications Systems (ANCS 2005), October 26 - 28, 2005, Princeton, NJ, USA.

    4. A Low Latency Router Supporting Adaptivity for On-Chip Interconnects,
      the 42nd Design Automation Conference (DAC 2005), June 13 -17, 2005, Anaheim Convention Center, California, USA.